Please use this identifier to cite or link to this item: doi:10.22028/D291-47772
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Title: AnyHLS: High-Level Synthesis With Partial Evaluation
Author(s): Ozkan, M. Akif
Perard-Gayot, Arsene
Membarth, Richard
Slusallek, Philipp
Leisa, Roland
Hack, Sebastian
Teich, Jurgen
Hannig, Frank
Language: English
Title: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume: 39
Issue: 11
Pages: 3202-3214
Publisher/Platform: IEEE
Year of Publication: 2020
Free key words: Field programmable gate arrays
functional programming
high level synthesis
image processing
DDC notations: 004 Computer science, internet
Publikation type: Journal Article
DOI of the first publication: 10.1109/TCAD.2020.3012172
URL of the first publication: https://doi.org/10.1109/TCAD.2020.3012172
Link to this record: urn:nbn:de:bsz:291--ds-477725
hdl:20.500.11880/41777
http://dx.doi.org/10.22028/D291-47772
ISSN: 1937-4151
0278-0070
Date of registration: 7-May-2026
Faculty: MI - Fakultät für Mathematik und Informatik
Department: MI - Informatik
Professorship: MI - Prof. Dr. Sebastian Hack
MI - Prof. Dr. Philipp Slusallek
Collections:SciDok - Der Wissenschaftsserver der Universität des Saarlandes

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