Please use this identifier to cite or link to this item: doi:10.22028/D291-38459
Title: Resolution-Related Design Considerations for a 120-GS/s 8-bit 2 :1 Analog Multiplexer in SiGe-BiCMOS Technology
Author(s): Collisi, Michael
Möller, Michael
Language: English
Title: IEEE Journal of Solid-State Circuits
Volume: 56
Issue: 9
Pages: 2624-2634
Publisher/Platform: IEEE
Year of Publication: 2021
Free key words: Analog multiplexer (AMUX)
digital-toanalog-converter (DAC)
effective number of bits (ENoB)
high speed
linearity explanatory model
SiGe-Bipolar CMOS (BiCMOS)
DDC notations: 500 Science
Publikation type: Journal Article
Abstract: This article presents a 120-GS/s 2:1 8-bit analog multiplexer (AMUX) in SiGe-Bipolar CMOS (BiCMOS) technology that exhibits the highest effective resolution reported for an AMUX in any kind of semiconductor technology. This article presents the design considerations that have led to this high resolution. In particular, it contains a discussion on the choice of an AMUX circuit concept to support high linearity. A frequency-domain explanatory model for the signal contribution to the effective number of bits (ENoB) in the presence of mismatch errors is presented and applied to the analysis of timing and signal gain mismatch in the AMUX setup. Typical ENoB versus frequency characteristics were identified and utilized to speed up ENoB simulations and to develop calibration procedures for the different mismatch types in the AMUX setup. The results of the analysis and the performance of the AMUX in the calibrated setup were proven by measurement results.
DOI of the first publication: 10.1109/JSSC.2021.3092747
URL of the first publication:
Link to this record: urn:nbn:de:bsz:291--ds-384599
ISSN: 1558-173X
Date of registration: 8-Dec-2022
Faculty: NT - Naturwissenschaftlich- Technische Fakultät
Department: NT - Systems Engineering
Professorship: NT - Prof. Dr. Michael Möller
Collections:SciDok - Der Wissenschaftsserver der Universität des Saarlandes

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